A solid state disk (SSD) has a SATA interface to connect to other electronic devices through SATA bus. The SSD saves data by flash or other nonvolatile memory. In most cases, the Windows file explorer transfers 64 Kbyte data per ATA command and the smallest erasable unit in current flash memory chips for SSD might be 128 Kbytes or larger, so it might need multiple ATA commands to write up to a whole smallest erasable unit. To improve the read/write speed, an SSD simultaneously reads/writes multiple flash memory chips and thereby might erase times of 128 Kbytes each time. FIGS. 1A-1D picture a conventional writing process in a SATA SSD. Assuming that this SSD uses two flash memory chips 10 and 12, each having the smallest erasable unit of 128 Kbytes, when the SSD executes a write command for writing 64 Kbyte data, it will backup the data in the target smallest erasable units 102 and 122 that are not to be changed into some data backup areas 104 and 124 at first, as shown in FIG. 1A, and then erases the smallest erasable units 102 and 122, as shown in FIG. 1B. Now the smallest erasable units 102 and 122 are written with 32 Kbytes therein, respectively, as shown in FIG. 1C. At last, the data in the data backup areas 104 and 124 are copied back to the residue space of the smallest erasable units 102 and 122, as shown in FIG. 1D. For more and detail information about SATA and SATA SSD, readers are referred to “Serial ATA Revision 2.5” and U.S. Pat. No. 7,003,623.
In the conventional operations, however, before completing an ATA command, an SSD does not know anything about the next ATA command. When four write commands, each for writing 64 Kbyte data, are randomly received from a host, the process described through FIGS. 1A-1D will be performed with four times even if the four write commands are writing to non-overlapped spaces of the same smallest erasable unit. In other words, there will be four times of backup operations, four times of erasing operations, four times of writing operations, and four times of copyback operations in this situation. FIG. 2 shows an executive sequence of multiple write commands in a conventional SATA SSD, in which a flash memory chip 14 has two smallest erasable units Block 0 and Block 1. When receiving three write commands, the SATA SSD will execute these commands according to the sequence that the commands are received. At first, the command 1 is executed with the process shown in FIGS. 1A-1D to write data into the smallest erasable unit Block 0. Then, the command 2 is executed with the process shown in FIGS. 1A-1D to write data into the smallest erasable unit Block 1. Finally, the command 3 is executed with the process shown in FIGS. 1A-1D to write data into the smallest erasable unit Block 0. Although the command 1 and the command 3 are both executed to write to the smallest erasable unit Block 0, the process shown in FIGS. 1A-1D has to be performed twice. Such manipulation is less efficient and will shorten the lifetime of the flash memory chips due to repeated erasing and writing operations.
FIGS. 3A-3C picture another conventional writing process in a SATA SSD. Assuming that this SSD uses two flash memory chips 16 and 18, each having the smallest erasable unit of 128 Kbytes, when the SSD executes a write command for writing 64 Kbyte data, it will first ensure that unused smallest erasable units 162 and 182 have been erased, as shown in FIG. 3A. Then, the smallest erasable units 162 and 182 are written with 32 Kbytes therein, respectively, as shown in FIG. 3B. At last, data in some original data areas 164 and 184 are copied to the residue space of the smallest erasable units 162 and 182, and the original data areas 164 and 184 are marked to be unused smallest erasable units. This approach would eliminate one time of backup per each writing process, but the process shown in FIGS. 3A-3C is still repeated each time to execute a write command and causes poor efficiency.
Therefore, it is desired a more efficient nonvolatile storage device and writing method for a nonvolatile storage device.